1. Field of the Invention
The present invention relates to a magnetoresistance element to read out data using an magnetoresistance effect, and to a storage device using such a magnetoresistance element.
2. Background of the Related Art
In recent years, there have been remarkable increases in the storage capacity of nonvolatile semiconductor storage devices, of which flash memory is representative, and the release of products with capacities of approximately 32 gigabytes have been announced. Nonvolatile semiconductor storage devices are rapidly gaining commercial value as USB memory and storage for portable telephones in particular, and such inherently superior characteristics of solid-state element memory as resistance to vibration, high reliability, and low power consumption are attracting attention, so that such storage devices are becoming the mainstream of storage for portable music players for music and video, and other storage devices for portable electronic equipment.
On the other hand, separately from the above applications in storage devices, vigorous research is being performed aiming at realizing nonvolatile semiconductor storage devices with performance similar to that of DRAM (dynamic random-access memory), which is currently used as the main memory of information equipment. A goal of this research is to realize a so-called “instant-on computer”, that is, a computer which can be started instantly at the time of use, with vanishingly little power consumed during standby. It is said that a memory element of such nonvolatile semiconductor storage element must satisfy the technical specifications, required of DRAM, of (1) a switching time of less than 50 ns, and (2) a number of rewrite cycles exceeding 1016. The lower limit for the number of rewrite cycles (1016) given in the above technical specifications is a numerical figure proposed on the basis of the number of accesses when the device is accessed once every 30 ns, continuously for 10 years. When a nonvolatile storage device is used as mainframe memory, refresh cycles are unnecessary, and so use in applications similar to those of current DRAM is possible even with a smaller number of rewrite cycles.
As candidates for such next-generation nonvolatile semiconductor storage devices, research and development is being performed on nonvolatile memory elements based on various principles, such as ferroelectric memory (FeRAM), magnetic memory (MRAM), phase-change memory (PRAM), and similar. However, MRAM using magnetoresistance elements as memory elements is regarded as the most promising candidate to replace DRAM and satisfying the above technical specifications. Below, memory elements using magnetoresistance elements are called “magnetic memory elements”. Although MRAM is at the prototype level, performance on the level of 1012 or more rewrite cycles has been attained, and operation is also fast, with switching times under 10 ns, so that among nonvolatile storage devices the feasibility of realization is high compared with other technologies.
The biggest problem with this MRAM is that the area occupied by one memory cell (the cell area) is large, and this is accompanied by high cost. Specifically, small-capacity RAM of approximately 4 Mbits which is currently being commercialized is the current magnetic-field rewrite type, and if the minimum feature size of the manufacturing process is F, then the cell area is 20 to 30 F2 or greater, and microminiaturization of cells themselves is difficult. Further, in current magnetic-field rewrite type MRAM, when the cell area is microminiaturized, the reversal magnetic field (that is the minimum value as an external magnet field to reverse the magnetization) increases, and there is the problem that as the degree of integration is raised and microminiaturization advances, the current value necessary for the magnetization reversal increased. Because of these problems, replacement of DRAM with current magnetic-field rewrite type MRAM is not practical.
In response to these circumstances, two breakthrough technologies are changing matters. One is a method employing MTJs (magnetic tunnel junctions) using an MgO tunnel barrier insulating film; a magnetoresistance ratio of 200% or higher is easily obtained (see D. D. Djayaprawire et al, “230% room-temperature magnetoresistance in CoFeB/MgO/CoFeB magnetic tunnel junctions”, Applied Physics Letters, Vol. 86, 092502, 2005). Another is a current-induced magnetization switching method. In particular, in the current-induced magnetization switching method, there are no difficulties with microminiaturization arising from basic principles, as in the above increase in the reversal magnetic field accompanying microminiaturization; on the contrary, microminiaturization results in a decrease in current to reverse the magnetization according to a scaling rule, so that with microminiaturization, the write energy can be reduced. By means of this current-induced magnetization switching method, memory cells can be configured which use one transistor per magnetic tunnel junction (MTJ), so that it is predicted that cell areas can ideally be reduced to from 6 to 8F2, that is, comparable to DRAM (see J. Hayakawa et al, “Current-induced magnetization switching in MgO barrier based magnetic tunnel junctions with CoFeB/Ru/CoFeB synthetic ferrimagnetic free layer”, Japanese Journal of Applied Physics, Vol. 45, L1057-1060, 2006). Below, a configuration in which a memory cell uses one transistor per magnetic tunnel junction (MTJ) is called a “one transistor-one MTJ configuration”. Further, aiming at a small cell area (approximately 4F2) on a par with flash memory, there has also been a proposal of a memory cell configuration which uses one diode per MTJ (a “one diode-one MTJ configuration”) (see Japanese Patent Laid-open No. 2004-179483). And, there has also been a proposal, in an element provided with a driving layer in which the magnetization direction is substantially fixed in the stacking direction, in which the number of transistor types is reduced from two to one by using only one current polarity to simplify the circuit, and realizing a one transistor-one MTJ circuit with cell size reduced to be comparable to DRAM (see Japanese Patent Laid-open No. 2006-128579).
However, in the above proposal of a one diode-one MTJ configuration disclosed in Japanese Patent Laid-open No. 2004-179483, switching is performed using currents in both the directions of the forward bias and the reverse bias via the diode. That is, switching is performed using the current in the forward-direction bias (forward-direction current) and the leak current in the reverse-direction bias, and there is no change in the principle of performing switching by means of current polarity. Here, a diode is originally formed in order to select MTJs without disturbance (crosstalk) in write, erase, and read operations, and leak currents flow not only in the reverse direction, but in the forward direction also. According to the above proposal, which employs as a principle of operation the occurrence of switching by a leak current in a reverse-direction bias, a current of value sufficient for use in switching also flows at low voltages when biased in the forward direction. Hence using the above operation principle, the effect in preventing disturbances is inadequate. That is, in cases in which switching by a reverse-bias leak current is possible, current flows even at low voltages for forward-direction bias, and a problem of disturbances similar to that of simple matrix-type memory without element selection switching cannot be avoided, so that a highly integrated element cannot be realized. In this way, in order to realize crosspoint-type memory employing a one diode-one MTJ configuration having a minimum cell area of 4F2, a conventional current-induced magnetization switching method employing the operation principle of switching through the current polarity cannot be adopted.
Further, in the proposal disclosed in Patent Document 2, that is, the proposal of a one transistor-one MTJ configuration using an element provided with a driving layer the magnetization direction in which is substantially fixed in the stacking direction, a method is used to perform switching in which spin precession is caused by spin injection from the driving layer into a free layer. By means of this method, switching is possible using current which in principle has only one polarity. However, in the principle of operation of causing spin precession by spin injection from the driving layer, there is the problem that magnetization arrangements (combinations of magnetization directions) in which the directions of magnetization in the free layer (recording layer) and pinned layer (fixed-magnetization layer) are either parallel or antiparallel tend to be either parallel or antiparallel. Further, in this proposal there is the concern that the direction of magnetization in the pinned layer (fixed-magnetization layer) may change, and so the problem occurs that with respect to achieving a number of rewrite cycles comparable to DRAM, reliability may be reduced.
The present invention was devised in light of the above problems, and has as an object the provision of a magnetic memory element with a one diode-one MTJ configuration which performs switching using only one current polarity, which until now had been difficult, that is, a magnetic memory element with a one diode-one MTJ configuration which can perform switching operations using single-polarity electric pulses, as well as a storage device using such a magnetic memory element, and by this means contributing to further compactness, larger capacities, and higher upper limits for the number of rewrite cycles of nonvolatile semiconductor storage devices.